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scas583j ? november 1996 ? revised february 2005 1 post office box 655303 ? dallas, texas 75265 1.4-k ? pullup resistors integrated on all open-drain outputs eliminate the need for discrete resistors esd protection exceeds 2000 v per mil-std-883, method 3015; exceeds 200 v using machine model (c = 200 pf, r = 0) designed for the ieee std 1284-i (level 1 type) and ieee std 1284-ii (level 2 type) electrical specifications flow-through architecture optimizes pcb layout package options include plastic 300-mil shrink small-outline (dl) and thin-shrink small-outline (dgg) packages description/ordering information the SN74LVC161284 is designed for 3-v to 3.6-v v cc operation. this device provides asynchronous two-way communication between data buses. the control-function implementation minimizes external timing requirements. this device has eight bidirectional bits; data can flow in the a-to-b direction when dir is high and in the b-to-a direction when dir is low. this device also has five drivers, which drive the cable side, and four receivers. the SN74LVC161284 has one receiver dedicated to the host logic line and a driver to drive the peri logic line. the output drive mode is determined by the high-drive (hd) control pin. when hd is high, the outputs are in a totem-pole configuration, and in an open-drain configuration when hd is low. this meets the drive requirements as specified in the ieee std 1284-i (level 1 type) and ieee std 1284-ii (level 2 type) parallel peripheral-interface specifications. except for host logic in and peri logic out, all cable-side pins have a 1.4-k ? integrated pullup resistor. the pullup resistor is switched off if the associated output driver is in the low state or if the output voltage is above v cc cable. if v cc cable is off, peri logic out is set to low. the device has two supply voltages. v cc is designed for 3-v to 3.6-v operation. v cc cable supplies the inputs and output buf fers of the cable side only and is designed for 3-v to 3.6-v and for 4.7-v to 5.5-v operation. even when v cc cable is 3 v to 3.6 v, the cable-side i/o pins are 5-v tolerant. the SN74LVC161284 is characterized for operation from 0 c to 70 c. copyright ? 2005 texas instruments incorporated please be aware that an important notice concerning avail ability, standard warranty, and use in critical applications of texas instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. dgg or dl package (top view) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 hd a9 a10 a11 a12 a13 v cc a1 a2 gnd a3 a4 a5 a6 gnd a7 a8 v cc peri logic in a14 a15 a16 a17 host logic out dir y9 y10 y11 y12 y13 v cc cable b1 b2 gnd b3 b4 b5 b6 gnd b7 b8 v cc cable peri logic out c14 c15 c16 c17 host logic in
package preview package preview scas583j ? november 1996 ? revised february 2005 2 post office box 655303 ? dallas, texas 75265 description/ordering information (continued) ordering information t a package ? orderable part number top-side marking tssop ? dgg tape and reel SN74LVC161284dggr ssop ? dl tape SN74LVC161284dl lvc161284 0 c to 70 c ssop ? dl tape and reel SN74LVC161284dlr lvc161284 0 c to 70 c tssop ? dgg tape and reel 74lvc161284dggrg4 ssop ? dl tape 74lvc161284dlre4 lvc161284 ssop ? dl tape and reel 74lvc161284dlrg4 lvc161284 ? package drawings, standard packing quantities, thermal data, symbolization, and pcb design guidelines are available at www.ti.com/sc/package. function table inputs output mode dir hd output mode l l open drain a9?a13 to y9?y13 and peri logic in to peri logic out l l totem pole b1?b8 to a1?a8 and c14?c17 to a14?a17 l h totem pole b1?b8 to a1?a8, a9?a13 to y9?y13, peri logic in to peri logic out, and c14?c17 to a14?a17 h l open drain a1?a8 to b1?b8, a9?a13 to y9?y13, and peri logic in to peri logic out h l totem pole c14?c17 to a14?a17 h h totem pole a1?a8 to b1?b8, a9?a13 to y9?y13, c14?c17 to a14?a17, and peri logic in to peri logic out
scas583j ? november 1996 ? revised february 2005 3 post office box 655303 ? dallas, texas 75265 logic diagram see note b see note b see note a b1?b8 y9?y13 peri logic out c14?c17 host logic in v cc cable dir hd a1?a8 a9?a13 peri logic in a14?a17 host logic out 42 48 1 19 24 30 25 notes: a. the pmos transistor prevents backdriving current from the signal pins to v cc cable when v cc cable is open or at gnd. b. the pmos transistors prevent backdriving current from the signal pins to v cc cable when v cc cable is open or at gnd. the pmos transistor is turned off when the associated driver is in the low state.
scas583j ? november 1996 ? revised february 2005 4 post office box 655303 ? dallas, texas 75265 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) ? supply voltage range: v cc cable ?0.5 v to 7 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v cc ?0.5 v to 4.6 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . input and output voltage range, v i and v o : cable side (see notes 1 and 2) ?2 v to 7 v . . . . . . . . . . . . . . . . . . peripheral side (see note 1) ?0.5 v to v cc + 0.5 v . . . . . . . . . . . input clamp current, i ik (v i < 0) ?20 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . output clamp current, i ok (v o < 0) ?50 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . continuous output current, i o : except peri logic out 50 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . peri logic out 100 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . continuous current through each v cc or gnd 200 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . output high sink current, i sk (v o = 5.5 v and v cc cable = 3 v) 65 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . package thermal impedance, ja (see note 3): dgg package 89 c/w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . dl package 94 c/w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . storage temperature range, t stg ?65 c to 150 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ? stresses beyond those listed under ?absolute maximum ratings? may cause permanent damage to the device. these are stress ratings only, a nd functional operation of the device at these or any other conditions beyond those indicated under ?recommended operating conditi ons? is not implied. exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. notes: 1. the input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. the ac input voltage pulse duration is limited to 40 ns if the amplitude is greater than ?0.5 v. 3. the package thermal impedance is calculated in accordance with jesd 51. recommended operating conditions (see note 4) min max unit v cc cable supply voltage for the cable side, v cc cable v cc 3 5.5 v v cc supply voltage 3 3.6 v a, b, dir, and hd 2 v ih high-level input voltage c14?c17 2.3 v v ih high-level input voltage host logic in 2.6 v peri logic in 2 a, b, dir, and hd 0.8 v il low-level input voltage c14?c17 0.8 v v il low-level input voltage host logic in 1.6 v peri logic in 0.8 v i input voltage peripheral side 0 v cc v v i input voltage cable side 0 5.5 v v o open-drain output voltage hd low 0 5.5 v hd high, b and y outputs ?14 i oh high-level output current a outputs and host logic out ?4 ma i oh high-level output current peri logic out ?0.5 ma b and y outputs 14 i ol low-level output current a outputs and host logic out 4 ma i ol low-level output current peri logic out 84 ma t a operating free-air temperature 0 70 c note 4: all unused inputs of the device must be held at v cc or gnd to ensure proper device operation. refer to the ti application report, implications of slow or floating cmos inputs , literature number scba004.
scas583j ? november 1996 ? revised february 2005 5 post office box 655303 ? dallas, texas 75265 electrical characteristics over recommended operating free-air temperature range, v cc cable = 5 v (unless otherwise noted) parameter test conditions v cc min typ ? max unit ? v t input hysteresis v thh ? v thl for all inputs except the c inputs and host logic in 3.3 v 0.4 v ? v t input hysteresis v thh ? v thl for the host logic in 3.3 v 0.2 v v thh ? v thl for the c inputs 3.3 v 0.8 hd high, b and y outputs i oh = ?14 ma 3 v 2.23 hd high, b and y outputs i oh = ?14 ma 3.3 v ? 2.4 v oh hd high, a outputs, and i oh = ?4 ma 3 v 2.4 v v oh hd high, a outputs, and host logic out i oh = ?50 a 3 v 2.8 v peri logic out i oh = ?0.5 ma 3.15 v 3.1 peri logic out i oh = ?0.5 ma 3.3 v ? 4.5 b and y outputs i ol = 14 ma 3 v 0.77 v ol a outputs and host logic out i ol = 50 a 3 v 0.2 v v ol a outputs and host logic out i ol = 4 ma 3 v 0 4 v peri logic out i ol = 84 ma 3 v 0.8 c inputs v i = v cc 3.6 v 50 a i i c inputs v i = gnd (pullup resistors) 3.6 v ?3.5 ma i i all inputs except the b or c inputs v i = v cc or gnd 3.6 v 1 a b outputs v o = v cc 3.6 v 20 a i oz b outputs v o = gnd (pullup resistors) 3.6 v ?3.5 ma i oz a1?a8 v o = v cc or gnd 3.6 v 20 a open-drain y outputs v o = gnd (pullup resistors) 3.6 v ?3.5 ma i off leakage to gnd, b and y outputs v i or v o = 0 to 7 v 0 v 100 a i off leakage to v cc , b and y outputs v i or v o = 0 to 7 v 0 v 10 a i cc ? v i = v cc , i o = 0 3.6 v 0.8 ma i cc ? v i = gnd (12 pullup) 3.6 v 45 ma c i control inputs v i = v cc or gnd 3.3 v 3 4 pf c io all inputs v o = v cc or gnd 3.3 v 7 15 pf z o cable side i oh = ?35 ma 3.3 v 45 ? r pullup cable side v o = 0 v (in hi z) 3.3 v 1.15 1.65 k ? ? typical values are measured at v cc = 3.3 v, v cc cable = 5 v, and t a = 25 c. ? v cc cable = 4.7 v v cc cable = 3.6 v ? a maximum current of 170 a per pin is added to i cc if the pullup resistor pin is above v cc .
scas583j ? november 1996 ? revised february 2005 6 post office box 655303 ? dallas, texas 75265 switching characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see figures 1 and 2) parameter from (input) to (output) min typ ? max unit t plh totem pole a or b b or a 1 40 ns t phl totem pole a or b b or a 1 40 ns t slew totem pole cable-side outputs 0.05 0.4 v/ns t en totem pole hd b, y, and peri logic out 1 25 ns t dis totem pole hd b, y, and peri logic out 1 25 ns t en ?t dis 1 10 ns t en dir a 1 50 ns t dis dir a 1 15 ns t dis dir b 1 50 ns t r , t f open drain a b or y 120 ns t sk(o) ? a or b b or a 2.5 10 ns ? typical values are measured at v cc = 3.3 v, v cc cable = 5 v, and t a = 25 c. ? skew is measured at 1/2 (v oh + v ol ) for signals switching in the same direction. operating characteristics, v cc = 3.3 v, t a = 25 c parameter test conditions typ unit c pd power dissipation capacitance outputs enabled c l = 0, f = 10 mhz 45 pf
scas583j ? november 1996 ? revised february 2005 7 post office box 655303 ? dallas, texas 75265 parameter measurement information output (see note c) t phl t plh from b or y output under test slew rate a-to-b or a-to-y load (totem pole) voltage waveforms measured at tp1 propagation delay times (a to b) 2.7 v v oh v ol 0 v 62 ? c l = 50 pf (see note a) tp1 v cc c l = 50 pf (see note a) sink load source load 1.4 v v oh ? 1.4 v 62 ? t phl t plh input (see note b) output (see note b) 1.4 v v ol + 1.4 v t w a-to-b load or a-to-y load (open drain) voltage waveforms measured at tp1, b side 2.7 v v oh v ol 0 v 1.4 v 1.4 v 2 v 2 v 0.8 v 0.8 v t r t f tp1 from b or y output c l = 50 pf (see note a) 500 ? v cc notes: a. c l includes probe and jig capacitance. b. input rise and fall times are 3 ns, 150 ns < pulse duration < 10 s for both low-to-high and high-to-low transitions. slew rate is measured between 0.4 v and 0.9 v for the rising edge and between 2.4 v and 1.9 v for the falling edge. c. input rise and fall times are 3 ns. rise and fall times (open drain) < 120 ns. d. the outputs are measured one at a time, with one transition per measurement. input (see note c) figure 1. load circuits and voltage waveforms
scas583j ? november 1996 ? revised february 2005 8 post office box 655303 ? dallas, texas 75265 parameter measurement information input (see note d) from output under test c l = 50 pf (see note a) load circuit s1 v cc 2 v open gnd 500 ? 500 ? output control output waveform 1 s1 at v cc 2 v (see note c) output waveform 2 s1 at gnd (see note c) v ol v oh t pzl t pzh t plz t phz 1.4 v 1.4 v 3 v 0 v 1.4 v v ol + 0.3 v 1.4 v v oh ? 0.3 v 0 v 2.7 v voltage waveforms enable and disable times t plh /t phl t plz /t pzl t phz /t pzh open v cc 2 v gnd test s1 notes: a. c l includes probe and jig capacitance. b. input rise and fall times are 3 ns. c. waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. d. input rise and fall times are 3 ns. pulse duration is 150 ns < t w < 10 s. e. the outputs are measured one at a time, with one transition per measurement. t phl t plh voltage waveforms propagation delay times (b to a) 2.7 v v oh v ol 0 v 1.4 v 50% v cc input (see note b) output 1.4 v 50% v cc b-to-a load (totem pole) t phl t plh from b or y output under test a-to-b load or a-to-y load (totem pole) voltage waveforms measured at tp1 propagation delay times (a to b) 2.7 v v oh v ol 0 v 500 ? c l = 50 pf (see note a) tp1 v cc c l = 50 pf (see note a) sink load source load 1.4 v v oh ? 1.4 v 500 ? t phl t plh output 1.4 v v ol + 1.4 v t w figure 2. load circuit and voltage waveforms
packaging information orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish msl peak temp (3) 74lvc161284dggrg4 active tssop dgg 48 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 74lvc161284dlre4 preview ssop dl 48 1000 tbd call ti call ti 74lvc161284dlrg4 active ssop dl 48 1000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim SN74LVC161284dggr active tssop dgg 48 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim SN74LVC161284dl active ssop dl 48 25 green (rohs & no sb/br) cu nipdau level-1-260c-unlim SN74LVC161284dlg4 active ssop dl 48 25 green (rohs & no sb/br) cu nipdau level-1-260c-unlim SN74LVC161284dlr active ssop dl 48 1000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim (1) the marketing status values are defined as follows: active: product device recommended for new designs. lifebuy: ti has announced that the device will be discontinued, and a lifetime-buy period is in effect. nrnd: not recommended for new designs. device is in production to support existing customers, but ti does not recommend using this part in a new design. preview: device has been announced but is not in production. samples may or may not be available. obsolete: ti has discontinued the production of the device. (2) eco plan - the planned eco-friendly classification: pb-free (rohs), pb-free (rohs exempt), or green (rohs & no sb/br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. tbd: the pb-free/green conversion plan has not been defined. pb-free (rohs): ti's terms "lead-free" or "pb-free" mean semiconductor products that are compatible with the current rohs requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. where designed to be soldered at high temperatures, ti pb-free products are suitable for use in specified lead-free processes. pb-free (rohs exempt): this component has a rohs exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. the component is otherwise considered pb-free (rohs compatible) as defined above. green (rohs & no sb/br): ti defines "green" to mean pb-free (rohs compatible), and free of bromine (br) and antimony (sb) based flame retardants (br or sb do not exceed 0.1% by weight in homogeneous material) (3) msl, peak temp. -- the moisture sensitivity level rating according to the jedec industry standard classifications, and peak solder temperature. important information and disclaimer: the information provided on this page represents ti's knowledge and belief as of the date that it is provided. ti bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. efforts are underway to better integrate information from third parties. ti has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ti and ti suppliers consider certain information to be proprietary, and thus cas numbers and other limited information may not be available for release. in no event shall ti's liability arising out of such information exceed the total purchase price of the ti part(s) at issue in this document sold by ti to customer on an annual basis. package option addendum www.ti.com 6-aug-2007 addendum-page 1
tape and reel box information device package pins site reel diameter (mm) reel width (mm) a0 (mm) b0 (mm) k0 (mm) p1 (mm) w (mm) pin1 quadrant SN74LVC161284dggr dgg 48 site 41 330 24 8.6 15.8 1.8 12 24 q1 SN74LVC161284dlr dl 48 site 41 330 32 11.35 16.2 3.1 16 32 q1 package materials information www.ti.com 4-oct-2007 pack materials-page 1
device package pins site length (mm) width (mm) height (mm) SN74LVC161284dggr dgg 48 site 41 346.0 346.0 41.0 SN74LVC161284dlr dl 48 site 41 346.0 346.0 49.0 package materials information www.ti.com 4-oct-2007 pack materials-page 2
mechanical data msso001c ? january 1995 ? revised december 2001 post office box 655303 ? dallas, texas 75265 dl (r-pdso-g**) plastic small-outline package 4040048 / e 12/01 48 pins shown 56 0.730 (18,54) 0.720 (18,29) 48 28 0.370 (9,40) (9,65) 0.380 gage plane dim 0.420 (10,67) 0.395 (10,03) a min a max 0.010 (0,25) pins ** 0.630 (16,00) (15,75) 0.620 0.010 (0,25) seating plane 0.020 (0,51) 0.040 (1,02) 25 24 0.008 (0,203) 0.0135 (0,343) 48 1 0.008 (0,20) min a 0.110 (2,79) max 0.299 (7,59) 0.291 (7,39) 0.004 (0,10) m 0.005 (0,13) 0.025 (0,635) 0 ? 8 0.005 (0,13) notes: a. all linear dimensions are in inches (millimeters). b. this drawing is subject to change without notice. c. body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15). d. falls within jedec mo-118
mechanical data mtss003d january 1995 revised january 1998 post office box 655303 ? dallas, texas 75265 dgg (r-pdso-g**) plastic small-outline package 4040078 / f 12/97 48 pins shown 0,25 0,15 nom gage plane 6,00 6,20 8,30 7,90 0,75 0,50 seating plane 25 0,27 0,17 24 a 48 1 1,20 max m 0,08 0,10 0,50 0 8 56 14,10 13,90 48 dim a max a min pins ** 12,40 12,60 64 17,10 16,90 0,15 0,05 notes: a. all linear dimensions are in millimeters. b. this drawing is subject to change without notice. c. body dimensions do not include mold protrusion not to exceed 0,15. d. falls within jedec mo-153
important notice texas instruments incorporated and its subsidiaries (ti) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. all products are sold subject to ti?s terms and conditions of sale supplied at the time of order acknowledgment. ti warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with ti?s standard warranty. testing and other quality control techniques are used to the extent ti deems necessary to support this warranty. except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. ti assumes no liability for applications assistance or customer product design. customers are responsible for their products and applications using ti components. to minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. ti does not warrant or represent that any license, either express or implied, is granted under any ti patent right, copyright, mask work right, or other ti intellectual property right relating to any combination, machine, or process in which ti products or services are used. information published by ti regarding third-party products or services does not constitute a license from ti to use such products or services or a warranty or endorsement thereof. use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from ti under the patents or other intellectual property of ti. reproduction of ti information in ti data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. reproduction of this information with alteration is an unfair and deceptive business practice. ti is not responsible or liable for such altered documentation. information of third parties may be subject to additional restrictions. resale of ti products or services with statements different from or beyond the parameters stated by ti for that product or service voids all express and any implied warranties for the associated ti product or service and is an unfair and deceptive business practice. ti is not responsible or liable for any such statements. ti products are not authorized for use in safety-critical applications (such as life support) where a failure of the ti product would reasonably be expected to cause severe personal injury or death, unless officers of the parties have executed an agreement specifically governing such use. buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications, and acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and any use of ti products in such safety-critical applications, notwithstanding any applications-related information or support that may be provided by ti. further, buyers must fully indemnify ti and its representatives against any damages arising out of the use of ti products in such safety-critical applications. ti products are neither designed nor intended for use in military/aerospace applications or environments unless the ti products are specifically designated by ti as military-grade or "enhanced plastic." only products designated by ti as military-grade meet military specifications. buyers acknowledge and agree that any such use of ti products which ti has not designated as military-grade is solely at the buyer's risk, and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use. ti products are neither designed nor intended for use in automotive applications or environments unless the specific ti products are designated by ti as compliant with iso/ts 16949 requirements. buyers acknowledge and agree that, if they use any non-designated products in automotive applications, ti will not be responsible for any failure to meet such requirements. following are urls where you can obtain information on other texas instruments products and application solutions: products applications amplifiers amplifier.ti.com audio www.ti.com/audio data converters dataconverter.ti.com automotive www.ti.com/automotive dsp dsp.ti.com broadband www.ti.com/broadband interface interface.ti.com digital control www.ti.com/digitalcontrol logic logic.ti.com military www.ti.com/military power mgmt power.ti.com optical networking www.ti.com/opticalnetwork microcontrollers microcontroller.ti.com security www.ti.com/security rfid www.ti-rfid.com telephony www.ti.com/telephony low power www.ti.com/lpw video & imaging www.ti.com/video wireless wireless www.ti.com/wireless mailing address: texas instruments, post office box 655303, dallas, texas 75265 copyright ? 2007, texas instruments incorporated

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